Close

Search

Search Menu
Photonics Media Photonics Buyers' Guide Photonics EDU Photonics Spectra BioPhotonics EuroPhotonics Industrial Photonics Photonics Showcase Photonics ProdSpec Photonics Handbook
More News
SPECIAL ANNOUNCEMENT
2016 Photonics Buyers' Guide Clearance! – Use Coupon Code FC16 to save 60%!
share
Email Facebook Twitter Google+ LinkedIn Comments

3-D Optical Circuit Inspection Probed

Photonics.com
Jan 2005
EDINBURGH, Scotland, Jan. 19 -- Scottish physicists are pioneering a project they say will demonstrate resolution improvement that will extend the lifetime of optical semiconductor inspection and probing techniques by many years.

Researchers in Edinburgh are developing techniques to enable optical inspection of integrated circuits (ICs) in three dimensions, with a depth resolution of just a few nanometres.

"If you scan a laser beam across an IC and monitor the photocurrent generated by looking at a couple of pins, you can build up a map that tells you a lot about the structure and morphology of the chip," said Derryck Reid, a physicist at Heriot Watt University.

Reid is using femtosecond pulses of a 1530-nm laser to probe the chip and employing a so-called solid immersion lens to artificially increase the half-angle of light incident on the IC, enlarging the illuminated area.

"The optical resolution scales inversely with this half angle," said Reid. "The wider the cone of rays that you can present at any feature inside a silicon chip, the higher the resolution with which you can image that feature."

The induced photocurrent is strongest at the point of highest light intensity, which is at the laser beam's focus. Restricting the depth of focus to 1 µm or less should make it possible to image 3-D sections accurately through an IC.

So far, Reid has used the techniques to image a junction, identifying a dopant diffused to a depth of about 1 µm in a substrate. Lateral resolution is currently 300 nm, but a project due to start in February will aim to improve that to 100 to 200 nm. That project will be funded by the Engineering and Physical Sciences Research Council, the UK funding agency for research and training in engineering and the physical sciences.

Reid said he thinks it will also be possible to reduce the depth resolution to a few nanometres, enabling 3-D imaging for inspection of chip features to the 45-nm process node.

For more information, visit: www.hw.ac.uk



Comments
Terms & Conditions Privacy Policy About Us Contact Us
back to top

Facebook Twitter Instagram LinkedIn YouTube RSS
©2016 Photonics Media
x We deliver – right to your inbox. Subscribe FREE to our newsletters.