SANTA CLARA, Calif., Feb. 9, 2006 -- Design engineering innovators were honored by the International Engineering Consortium (IEC) at DesignCon2006, being held this week at the Santa Clara Convention Center.
This year, the IEC's DesignVision Awards recognized the following products and companies:
ASIC and integrated design tools: Cadence X architecture design solution, Cadence Design Systems; design verification tools: pioneer-NTB SystemVerilog testbench automation tool, Synopsys; interconnect technologies and components: Amphenol TCS Crossbow connector; printed circuit board design tools: CircuitSpace, DesignAdvance Systems; semiconductors and ICs: fusion programmable system chip, Actel.
Also: semiconductors and ICs (IP): 1T-SRAM Classic Memory Macro family, MoSys; structured/platform ASIC, FPGA and PLD design tools: HardCopy II structured ASIC design flow, Altera; system-level design tools: Webench active filter designer, National Semiconductor; test and measurement equipment: BERTscope CR (clock recovery), SyntheSys Research.
DesignCon 2006 features 125 exhibiting companies, more than 100 sessions and tutorials and more than 200 speakers. IEC said it expected attendance to exceed 6000.
For more information, visit: www.designcon.com/2006