Shrinking the dimensions of electronic devices -- essential to keeping pace with the International Technology Roadmap for Semiconductors (ITRS) as well as adhering to Moore's Law -- will be the topic of the Challenges in Device Scaling TechXPOT at Semicon West 2006, to be held July 11-13 at the Moscone Center in San Francisco. The TechXPOT is one of four "shows-within-the-show" focusing on the latest trends and technologies. It will include sessions on equipment and materials challenges facing the semiconductor industry as it develops the devices and processes necessary for the 45- and 32-nm ITRS nodes. Other TechXPOTS at Semicon West will be Manufacturing Productivity & Effectiveness (Esplanade Hall, on improving manufacturing productivity within the fab and through better device design; MEMS—Nano—Energy (West Hall, Level 3), featuring companies and technologies on the cutting edge of micro— and nanoelectronics manufacturing; and Test—Assembly—Packaging (West Hall, Level 2). The Challenges in Device Scaling TechXPot, which will be held in the north hall of the Moscone Center, will feature sessions on topics including mask challenges, by Brian Grenon of Grenon Consulting Inc.; engineered substrates, by Mayank Bulsara, president of Atlas Technology; and interconnects and processes for advanced devices, with Ken Monnig, former associate director of Interconnect at International Sematech. Ralph Kirk, technical director of North America Programs at SEMI, said, "The intent of the TechXPOTs is to bring highly focused and relevant content to SEMICON West attendees. By segmenting SEMICON West into technical focus areas, we are creating dedicated locations that highlight similar innovative technologies, thereby allowing attendees to make more efficient use of their time at the expo." "There are many challenges to realizing 45- and 32-nm processing technologies," said Kirk. "Visitors to the Device Scaling TechXPOT will learn about and further explore these issues; then they can speak directly with the people who are developing the solutions." Sessions will also be held on advanced metrology: Stephen Knight, director of the Electronics and Electrical Engineering Laboratory, Office of Microelectronics Programs, at the National Institute of Standards and Technology, will discuss advances in lithography, and another session will focus on tools to identify defects and characterize thin films. George Petricich, vice president of product marketing at DNS Electronics, will chair a DNS Lithography Breakfast Forum (co-sponsored by Semi) as a TechXPOT satellite session, July 12 at 7:30 a.m. at the San Francisco Marriott. For more information about Semicon West 2006, visit: wps2a.semi.org/wps/portal/_pagr/123/_pa.123/302/calendar