Electron Tomography for Integrated Circuit Analysis
Daniel S. Burgess
To better detect nanoscale defects in integrated circuits, researchers at Cornell University in Ithaca, N.Y., and at IBM’s Thomas J. Watson Research Center in Yorktown Heights, N.Y., are exploring the suitability of a variant of electron tomography, a technique established in the life sciences. Their simulations and practical experiments suggest that incoherent bright-field electron tomography may be employed for 3-D imaging of interconnects, electromigration barriers, void structures and metallic particles in samples up to 1 μm thick.
Peter Ercius, a graduate student at Cornell’s School of Applied and Engineering Physics, noted that it is becoming more and more difficult for the industry to resolve overlapping structures on circuits at the atomic scale. Transmission electron microscopy offers a means of imaging the 5- to 50-nm features but has its limitations.
Restores volumetric image
“Like shadows on a wall, the images are only 2-D projections of real 3-D structures,” he said. “Buried voids, rough interfaces and overlapping features are all washed out and can be missed in projected images. This problem will only get worse as features become smaller and denser to pack more transistors onto a chip.” Electron tomography overcomes this by assembling a series of 2-D images to create a volumetric image of the sample, which Ercius likened to computed tomography in medical imaging but that employs electrons rather than x-rays. Another difference, he noted, is that the source and detector are fixed and the specimen rotated in the analysis space in electron tomography. “Something medical patients might object to,” he quipped.
Incoherent bright-field electron tomography, Ercius explained, is a new iteration of electron tomography that is ideal for imaging the materials used in integrated circuits. It collects more of the signal transmitted through the sample than the traditional technique, using a high-sensitivity detector with a low-noise, high-dynamic-range preamplifier to extract the desired information and resolve materials with similar mass thicknesses. As a result, it enables resolution of nanoscale structures 10 times thicker than is possible using standard electron tomography.
He said that its potential is just now being realized. “More diverse applications may become apparent if it becomes widely adopted.”
The researchers quantitatively modeled the interaction of an electron beam with a 30-nm gold feature on copper of increasing thicknesses and with tantalum, silver and copper of increasing thicknesses. Using the information gained from the simulation, they imaged a 210-nm3 stress void in a copper interconnect in a tantalum liner with an electron microscope from FEI Co. of Hillsboro, Ore., with a high-angle annular dark-field detector from E.A. Fischione Instruments Inc. of Export, Pa., and a preamplifier unit from Hamamatsu Photonics KK of Hamamatsu, Japan.
Ercius said that the scientists are employing the approach to measure the roughness and thickness of protective barriers around buried copper features in interconnects.
“We hope to apply the method to multilayered wire and interconnect structures to improve their conductivity and resistance to electromigration,” he said.
Applied Physics Letters, June 12, 2006, 243116.
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