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  • Laser Speeds Trimming Technique

Photonics Spectra
May 2001
Michael D. Wheeler

MONTREAL -- Recent advances in telecommunications have brought new challenges in integrating analog and digital components. Analog components require high accuracy, for example, which slows integration. Resistor ladders and trimming techniques on the resistances within the circuit address some of the problem, but the trimming requires a large area on the integrated circuit, which compromises functionality and adds to the processing steps, thus increasing production costs.

A laser-based trimming technique developed at École Polytechnique de Montréal promises to speed up the fabrication of mixed microelectronic systems. It could prove useful in the push toward system-on-a-chip technologies that include many microelectronic circuits.

Laser trimming

Now researchers at École Polytechnique de Montréal have pioneered a laser-based trimming technique that minimizes the need for a large die space and promises to speed fabrication of mixed microelectronics systems.

In a soon-to-be published white paper, Michel Meunier and his team describe the use of the technique on a conventional field-effect transistor without a gate. The transistor featured two highly doped regions (the drain and the source), separated by a lightly doped channel.

Using their method, a laser beam melts the silicon, which freezes into a solid and leaves the diffused dopants redistributed. The result is an electrical link, or resistance, between the drain and the source. This modifies, or "tunes," the resistance to the desired value.

The laser trimming system includes a 5-W argon-ion laser from Coherent Photonics Group, Laser Div., of Santa Clara, Calif., which the researchers can run at full power to create a strong local heat source. An acousto-optic modulator, controlled with a pulse generator, serves as a high-speed shutter. A microscope focuses the 2-µm laser spot on the transistor as it is held in place on an X-Y-Z positioning table. A CCD camera enables the operator to visualize the components on the integrated circuit as they are being trimmed.

CMOS compatible

An advantage of the technique is that it is compatible with the CMOS processes that semiconductor manufacturers have adopted, which could prove useful in the push toward system-on-a-chip technologies that include many microelectronic circuits.

As a result of the work, the team formed a spin-off company, LTrim Technologies, to exploit this technology for the design and fabrication of analog microelectronic chips.

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