A technique that uses self-assembled, self-aligned and defect-free nanowire channels made of gallium arsenide is being used to make transistors smaller and faster. Xiuling Li, an electrical and computer engineering professor at the University of Illinois, and graduate research assistant Seth Fortuna have made the first metal-semiconductor field-effect transistor fabricated with a self-assembled, planar gallium-arsenide nanowire channel. Nanowires are attractive building blocks for both electronics and photonics applications. Compound semiconductor nanowires, such as gallium arsenide, are especially desirable because of their better transport properties and versatile heterojunctions. However, a number of challenges – including integration with existing microelectronics – first must be overcome. Xiuling Li (left) and Seth Fortuna discovered a technique that uses self-assembled, self-aligned and defect-free nanowire channels made of gallium arsenide. Image courtesy of L. Brian Stauffer. “Our new planar growth process creates self-aligned, defect-free gallium-arsenide nanowires that could readily be scaled up for manufacturing purposes,” said Li, who also is affiliated with the university’s Micro and Nanoelectronics Laboratory and the Beckman Institute.“It’s a nonlithographic process that can precisely control the nanowire dimension and orientation, yet is compatible with existing circuit design and fabrication technology.” The gallium-arsenide nanowire channel used in the researchers’ demonstration transistor was grown by metallorganic chemical vapor deposition, using gold as a catalyst. The rest of the transistor was made with conventional microfabrication techniques. Although the diameter of the transistor’s nanowire channel was approximately 200 nm, nanowires with diameters as small as 5 nm can be made with the gold-catalyzed growth technique, the researchers report. The self-aligned orientation of the nanowires is determined by the crystal structure of the substrate and certain growth parameters. In earlier work, Li and Fortuna demonstrated that they could grow the nanowires and then transfer-print them onto other substrates, including silicon, for heterogeneous integration. A scanning electron microscope image of self-assembled planar gallium arsenide nanowires. The inset shows a field effect transistor fabricated with one of the nanowires. “Transferring the self-aligned planar nanowires while maintaining both their position and alignment could enable flexible electronics and photonics at a true nanometer scale,” the researchers wrote in the December 2008 issue of the journal Nano Letters. In work presented in the current paper, the researchers grew the gallium-arsenide nanowire channel in place, instead of transferring it. In contrast to the common types of nonplanar gallium arsenide nanowires, the researchers’ planar nanowire was free from twin defects, which are rotational defects in the crystal structure that decrease the mobility of the charge carriers. “By replacing the standard channel in a metal-semiconductor field-effect transistor with one of our planar nanowires, we demonstrated that the defect-free nanowire’s electron mobility was indeed as high as the corresponding bulk value,” Fortuna said. “The high electron mobility nanowire channel could lead to smaller, better and faster devices.” Considering their planar, self-aligned and transferable nature, the nanowire channels could help create higher performance transistors for next-generation integrated circuit applications, Li said. The high-quality planar nanowires also can be used in nanoinjection lasers for use in optical communications. The researchers also are developing new device concepts driven by further engineering of the planar one-dimensional nanostructure. The work was supported by the National Science Foundation. For more information, visit: www.illinois.edu