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Electronics Integrated with Photonics in 3-D on Silicon Chip

Breck Hitz

Researchers at the University of California, Los Angeles, have realized the three-dimensional integration of electronics and photonics in a monolithic silicon-on-insulator substrate. The photonic device was buried inside the silicon, while a metal-oxide semiconductor field-effect transistor (MOSFET) was on the surface. The investigators had previously demonstrated the buried photonic device (see “Photonics Goes Underground in Silicon,” Photonics Spectra, October 2005, page 18) but until now had been unable to fabricate operational electronics on the same device.


An optical micrograph shows a transistor fabricated on the surface silicon layer, and the photonic ring resonator and its waveguides in the buried layer beneath the surface.

An optical micrograph shows a transistor fabricated on the surface silicon layer, and the photonic ring resonator and its waveguides in the buried layer beneath the surface.

As electronic devices from cell phones to computers become ever smaller, the efficient use of silicon real estate becomes increasingly important. The integration technique, which the scientists call “Simox 3-D sculpting,” does not compromise the area available for electronics because the photonic features are implemented beneath the surface. This is accomplished by implanting oxygen ions to create an oxide layer that divides the silicon into a buried and a surface layer. The implantation of oxygen creates buried photonic components as it is performed through a lithographically patterned masking layer.

In their demonstration, the researchers fabricated a ring resonator and its associated waveguides in the buried photonic layer, then fabricated the MOSFET on the surface layer using conventional CMOS techniques.

The resonators in the buried layer showed extinction ratios as high as 20 dB. Metal-oxide semiconductor transistors on the surface layer displayed typical turn-on characteristics with a threshold voltage of around 2 V. Leakage currents were observed in these transistors, apparently caused by the defects created in the surface silicon layer during the implantation process. The scientists are investigating strategies to minimize such defects.

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