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Siemens, GlobalFoundries Unite Platforms to Verify Silicon Photonics

Siemens and GlobalFoundries (GF) extended their collaboration, shifting it into the silicon photonics market. Siemens Digital Industries Software’s Calibre nmPlatform enables designers to use the newest GF silicon photonics platform, GF Fotonix, which combines its differentiated 300-mm photonics and RF-CMOS (radio frequency-CMOS) features on a silicon wafer.

Siemens announced the extended solution with GF May 17. The companies are longtime partners. In 2021, GF certified Siemens’ Aprisa place-and-route solution for GF’s 22FDX platform.

GF Fotonix process design kits (PDKs) include Siemens’ Calibre nmDRC software for design rule checking (DRC) and Calibre nmLVS software for layout versus schematic (LVS) verification. Both Calibre tools are fully certified by GF, meaning mutual customers designing for the new GF Fotonix platform can continue to use the Calibre nmPlatform for silicon photonic devices as they have used for previous offerings.

GF Fotonix consolidates processes that can require distribution across multiple chips onto a single chip by combining a photonic system, RF components, and CMOS logic on a single silicon chip.


Siemens' Calibre nmPlatform now enables designers to leverage the newest GlobalFoundries silicon photonics platform. Siemens announced the extended collaboration with GF May 17. Courtesy of Siemens Digital Industries Software.
Silicon photonics enables companies to bring fiber optics directly into integrated circuits. However, silicon photonic devices contain curved layouts, rather than the linear Manhattan grid features found in traditional CMOS designs, Siemens said in a press release announcing the expanded collaboration with GF. Applying traditional CMOS DRC to silicon photonic layouts yields false positive errors that may not be immediately detected.

Siemens software allows rule checks to use equations in place of, or in addition to, linear measurements to enable accurate results.

Similarly, Siemens said that the curvilinear nature of photonic structures, together with the general lack of source netlists for optics, poses a challenge when performing LVS checking. Traditional IC LVS technology extracts physical measurements from well-understood electronic structures and compares them to the intended corresponding elements in the source netlist.

However, it is difficult to extract measurements with this approach from curved structures.

The Siemens/GF combination uses text and marker layers to discern regions of interest to resolve this obstacle, and the complete core Calibre offering reduces total verification cycle times.

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