Andy Weirich, OneChip Photonics, Inc.
Continually escalating demands for broader penetration of higher bandwidth, faster performance and rich-media applications are driving the ongoing worldwide deployment of fiber-based services. Even in the face of global economic challenges during the past two years, carriers and their equipment suppliers have experienced robust growth in the deployment of fiber-to-the-home and -building (FTTH/B) technologies.
As carriers compete to provide high-speed connectivity for delivering rich multimedia content and triple-play services, passive optical network (PON) deployments have kicked into high gear, and fiber-based networking is migrating ever closer to end users at the edge of the network infrastructure. However, even as 1G and 2G PON deployments ramp up dramatically, carriers and equipment suppliers must simultaneously plan for deployment of faster 10G PON capabilities within their network infrastructures.
OneChip’s PIC is the heart of a OneChip transceiver.
With 10G PONs rapidly coming over the technology horizon and industry standards now consolidating around 10G, the imperative of 10G PON deployments cannot be ignored. On the other hand, it also has become clear that the current technology approaches using off-the-shelf discrete components to design and manufacture 1G PON transceivers are inadequate for producing cost-effective 10G PON transceivers or achieving projected 10G deployment volumes.
These cost barriers and production challenges can be overcome through the use of monolithic photonic integrated circuits (PICs), which leverage proven indium phosphide (InP) processes to bring together all passive and active optical elements within a single-chip device. PIC technology effectively changes the game at the network edge by enabling low-cost, high-volume deployment of FTTH/B; by eliminating the production inefficiencies associated with current 1G PON techniques; and by providing a technology with a smooth, cost-effective forward-migration path to next-generation 10G PONs.
OneChip Diplexer PIC integrates a number of photonic devices. Images courtesy of OneChip Photonics Inc.
Escalating bandwidth demands and other factors are driving fiber closer to the end user, with an inevitable push toward convergence into FTTH. As optical fiber penetrates closer to the end user, the number of end users per optical network unit (ONU) is reduced, ultimately to a single user in the case of FTTH, fueling a massive demand for optical transceivers.
Networking at the edge
Based on provisions in the standard (IEEE Std. 802.3av) from the 10G-EPON (Ethernet PON) Task Force, 10G EPON is predicted to roll out in both asymmetric and symmetric variants. All variants would use 10G downstream but would differ on the upstream transmit capability. The asymmetric service (often referred to as 10/1) uses 1G transmitters for upstream communication, typically from the user side ONUs to the central office. In contrast, the symmetric service (known as 10/10) uses 10G transceivers for both upstream and downstream.
Many service providers have been evaluating their 10G options and conducting trials over the past two years, with 10G trials continuing this year and volume deployments forecast for 2011-2012. “Coexistence” of 1G and 10G will be a vital factor for service providers over the next few years, and ensuring a smooth technology transition between 1G and 10G PON will be a critical factor in their overall business success.
Until recently, PON transceivers were designed using discrete optics or planar lightwave circuits (PLCs). As described below, both of these approaches have inherent limitations.
As the name implies, discrete optics-based transceivers use discrete, off-the-shelf active and passive, or “bulk optics,” components. Most transceivers sold today are based on discrete optics designs. With as many as 20 separate passive and active devices in the transceiver, both the internal interconnects and the packaging can pose significant reliability challenges. The major drawback to discrete optics designs is that they require the manual assembly of many parts, which must be hermetically packaged (typically in metal) to prevent intrusion from gases and liquids, and mechanically stable to guard against component misalignment due to vibration and temperature variations. These individually assembled parts must be carefully aligned and also can fall out of alignment over time from the effects of environmental stresses.
There is little architectural or technical differentiation among discrete optics-based transceivers. Rather, vendors must compete on the basis of who can source and assemble the parts in a slightly cheaper fashion. And most of the opportunities to reduce labor costs already have been realized.
In an attempt to address some of the price/performance shortcomings, PLC designs mount laser diodes and photodiodes on a silica or silicon monolithic optical printed circuit board (PCB) containing interconnecting lightguides. However, PLC designs still require discrete active (and some passive) components and the assembly of as many as 10 parts. With up to 10 parts having to be interconnected on a silica substrate, alignment issues can significantly reduce yields and add costs.
The PIC approach, using an InP substrate and fabrication processes, enables all of the optical functions required for a PON transceiver to be monolithically implemented within a single device. This chip-level integration eliminates the use of discrete parts, avoids the cost of assembly and hermetic packaging of these parts, and reduces the overall size while improving reliability.
The InP fabrication process is used to create all active and passive elements – including the distributed-feedback (DFB) laser, optically preamplified detector, wavelength splitter, spot-size converter (SSC), photodiode (PD) and monitor photodiode (MPD), and various elements of passive waveguide circuitry, which are monolithically integrated into one part. There are no discrete parts or potential misalignment, and the PIC itself is inherently hermetic.
Because all of the active and passive elements are integrated in one epitaxial growth step, without the need for regrowth or postgrowth of the epitaxial material, the PIC eliminates all of the unnecessary and costly assembly steps previously associated with manufacturing optical transceivers, thereby optimizing cost, performance and reliability. A multiguide vertical integration approach enables creation of a platform for PON optical transceivers (and other photonic products), based on a small number of generic building blocks and suitable for outsourced wafer fabrication in commercial foundries.
PICs for 10G
The inherent advantages described above make the monolithic PIC approach a superior choice for volume deployment of PON at any speed. More importantly, the built-in extra performance margins make PIC-based designs the only approach that can cost-effectively support the migration to 10G PON and beyond.
To achieve 10G speeds, the laser performance and light-coupling alignment become critically more important than at 1G. For example, the DFB laser that is tightly integrated in the PIC approach becomes more than just an advantage; it is a fundamental requirement because the Fabry-Perot lasers typically used in 1G EPON designs are not even an option for delivering 10G upstream transmit speeds.
In addition, the discrete assembly approach increases in difficulty when it comes to the critical alignment issues involved with focusing light from the fiber onto the avalanche photodiode (APD). In a 1G implementation, this alignment is much more forgiving than it is with 10G because 1G receive performance can be achieved across a wider portion of the APD surface. It is helpful to think of the APD as analogous to a dartboard, with the higher-speed capabilities residing in the center and the lower speeds in the surrounding concentric circles. To achieve 10G speeds, the light from the fiber must be focused consistently on the “bullseye” of the APD but not on the surrounding rings. This requires an additional axis of alignment beyond the typical X-Y alignment used in assembling the receive chain discrete devices for 1G.
The added complexity of maintaining alignment of the fiber in the Z- as well as the X- and Y-axes has important implications for the production process in terms of cost and volumes. Today’s assembly lines for 1G PON discrete bidirectional optical subassemblies (BOSAs) are designed to handle two-axis (X-Y) alignment for the Rx components, and these lines are unable to control the forward-and-back alignment in the Z-axis that is necessary to achieve the spot size needed for 10G. This means that conversion of existing 1G production lines will require new capital equipment investments, driving up the cost of 10G devices. Also, the more complex alignment necessitates additional testing and alignment processes that reduce production throughput, also driving up costs.
In contrast, a monolithic PIC is designed for fully automated mounting on a silicon optical bench, using industry-standard, automated assembly processes and machines and without requiring any active alignment of the optics. Because the optical signal path is entirely contained in a solid-state, single monolithic InP semiconductor die, the PIC completely eliminates conventional free-space optical signal propagation and multiple discrete optical elements, resulting in a robust and reliable optical path. Besides offering the smallest footprint on the market, the monolithically integrated optical parts are aligned for life, and the parts are highly robust, making them inherently resistant to vibration and other outside elements.
As illustrated in Figure 2, the monolithic PIC device mounted on the silicon optical bench (SiOB) provides the heart of the BOSA, which is then integrated with the transceiver printed circuit board and housing to form the complete transceiver configuration.
The bottom line is that PIC technology has now ushered in the “integrated circuit era” for deploying photonics technology at the network edge. The ability to fully integrate all optical transceiver functions at the chip level makes it possible to achieve high-volume production for next-generation 10G PON while meeting the cost-sensitive requirements for universal FTTH deployment. At the same time, by defining a suite of reconfigurable chip-level building blocks, PIC-based designs also have established a forward-looking architectural foundation for moving the technology into a widening range of optical interface applications that require volume production, high performance and design flexibility.
Meet the author
Andy Weirich is vice president of product line management at OneChip Photonics Inc. in Ottawa; e-mail: firstname.lastname@example.org.