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NSF, SIA Join Forces for Nanoelectronic Research Exploration
Aug 2005
SAN JOSE, Calif., Aug. 17 -- The National Science Foundation (NSF) and the Nanoelectronics Research Initiative (NRI), a consortium of members of the Semiconductor Industry Association (SIA), have agreed to jointly fund a national university-based research program focused on long-term nanoelectronics exploration.

NSF and NRI will each contribute $1 million to support research they say has the goal of sustaining US leadership in the global semiconductor industry. The six NRI industrial participants contributing funding are AMD, Freescale Semiconductor, IBM, Intel, Micron Technology and Texas Instruments. This agreement represents the first step as part of the NRI, announced last November by SIA, aimed at the acceleration of nanoelectronics research in universities. NRI will be administered on behalf of the industrial participants by the Nanoelectronics Research Corp., a subsidiary of the Semiconductor Research Corp. (SRC), a university research management consortium.

"The global semiconductor industry is facing a critical technology transition over the next 10 to 15 years," said SIA President George Scalise. "The technology leaders of 2020 will be determined by actions taken today. The incubation period for new technologies is typically 15 years, making it essential for us to support basic research on nanoelectronics today."

The NRI will explore, both independently and in conjunction with government organizations, new approaches in emerging areas of electronics and other quantum variables (e.g., spin, phase, etc.) at the nanoscale level, aimed at discovering new devices that will work with industry-standard CMOS in the year 2020 and beyond. Paolo Gargini of Intel and Hans Stork of Texas Instruments will head the governing council overseeing NRI's efforts as chairman and vice chairman, respectively. Hans Coufal of IBM will lead the NRI Technical Program Group. Other governing council members are: Craig Sander (AMD), Betsy Weitzman (Freescale), John Warlaumount (IBM) and Mark Durcan (Micron).

Coordination with SIA and SRC will be the responsibility of SIA's Pushkar Apte and SRC's Larry Sumney. "For the first time, the US government and the US semiconductor industry are collaborating on long-term research on nanoelectronics," noted Gargini. "This is a very big deal over some very small structures. With these tiny nanotransistors -- 10 nm in size -- we will be able to build 10 billion transistors in the space of a period made by a ballpoint pen."

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