Researchers at MIT have made a significant advance in nanoscale lithographic technology. They have discovered that by using finer patterns of lines over larger areas they could offer more economical, high-precision microchips that would make possible the commercialization of many new nanotechnology inventions. This new technique could pave the way for advanced solar cells, next-generation computer memory and integrated circuit chips, and many other devices and applications. The team has created lines about 25 nanometers (billionths of a meter) wide separated by 25 nm spaces. For comparison, the most advanced commercially available computer chips today have a minimum feature size of 65 nm. Intel recently announced that it will start manufacturing at the 32 nm minimum line-width scale in 2009, and the industry roadmap calls for 25 nm features by 2015. MIT nanoruler lithography tool with a 300 mm-diameter silicon wafer. Photos courtesy of Ralf Heilmann. The MIT technique is economically attractive because it works without the chemically amplified resists, immersion lithography techniques and expensive lithography tools that are widely considered essential to work at this scale with optical lithography. While having many important scientific and commercial applications, periodic patterns at the nanoscale are notoriously difficult to produce with low cost and high yield. The MIT team includes Mark Schattenburg and Ralf Heilmann of the MIT Kavli Institute of Astrophysics and Space Research, and graduate students Chih-Hao Chang and Yong Zhao of the Department of Mechanical Engineering. Their results were recently presented at the 52nd International Conference on Electron, Ion and Photon Beam Technology and Nanofabrication in Portland, Ore. MIT graduate student Chih-Hao Chang demonstrates the absence of light diffraction from a frequency-doubled grating on a 100 mm-diameter silicon wafer. The wafer is immersed in water to enable blue-light optical diffraction from the 200 nm-period 'master' grating at the periphery of the wafer, while the center of the wafer, where the grating has a 100 nm pitch, exhibits no optical diffraction. Mr. Chang is standing in front of the MIT nanoruler tool which produced the patterns. Schattenburg and his colleagues used a technique known as interference lithography (IL) to generate the patterns, but they did so using a tool called the nanoruler (built by MIT graduate students) that is designed to perform a particularly high precision variant of IL called scanning-beam interference lithography, or SBIL. This recently developed technique uses 100 MHz sound waves, controlled by custom high-speed electronics, to diffract and frequency-shift the laser light, resulting in rapid patterning of large areas with unprecedented control over feature geometry. While IL has been around for a long time, the SBIL technique has enabled, for the first time, the precise and repeatable pattern registration and overlay over large areas, thanks to a new high-precision phase detection algorithm developed by Zhao and a novel image reversal process developed by Chang. "What we're finding is that control of the lithographic imaging process is no longer the limiting step. Material issues such as line sidewall roughness are now a major barrier to still-finer length scales. However, there are several new technologies on the horizon that have the potential for alleviating these problems,” says Schattenburg. “These results demonstrate that there's still a lot of room left for scale shrinkage in optical lithography. We don't see any insurmountable roadblocks just yet." The MIT team performed the research in the Space Nanotechnology Laboratory of the MIT Kavli Institute of Astrophysics and Space Research, with financial support from NASA and NSF. For more information, visit: www.mit.edu