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Singapore’s A*Star Forms Consortia to Advance IC Packaging

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SINGAPORE, July 15, 2016 — Singapore’s Agency for Science, Technology and Research (A*STAR) Institute of Microelectronics (IME) has reported the creation of two consortiums with a number of semiconductor companies to develop cost-effective 2.5D and 3D wafer-level integrated circuit (IC) packaging.

The Chip-on-Wafer Consortium II and the Cost-Effective Interposer Consortium will leverage the IME’s expertise  in IC integration, bonding technologies, and design and packaging for semiconductor dies to develop advanced chip packaging with the goal of reducing production costs and enabling volume manufacturing.

Through the Chip-on-Wafer Consortium I, IME and its partners have already demonstrated chip-on-wafer bonding with Cu-Cu diffusion bonding technology. Prior to the Cost-Effective Interposer Consortium, IME’s 2.5D Through-Silicon Interposer (TSI) Consortium demonstrated an end-to-end design-process-assembling-packaging flow for large-area TSIs with dense, multilevel CU interconnects.

For more information on IME and the consortiums, including lists of partner companies, visit
Jul 2016
BusinessAsia-PacificpartnershipsI*starSingaporeiStarIMEICintegrated circuitsphotonic interconnectspackagingintegrated photonicsthrough-silicon interposer

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