3D Architectures for Semiconductor Integration and Packaging

ISMT will be sole sponsor of a technical meeting, “3-D Technology, Modeling and Process (TMP) Symposium” that will offer several hours of presentations on capability, models, processes and equipment for 3-D that are needed to meet the requirements of the ITRS. This open symposium will take place April 13 at the Hyatt Regency San Francisco Airport Hotel in Burlingame, with an opening presentation by a representative of the Jet Propulsion Laboratory. A follow-on industry conference, entitled “3-D Architectures for Semiconductor Integration and Packaging” and organized by RTI International of Research Triangle Park, NC, will aim to provide strategic insights into market opportunities and challenges affecting 3-D integration and packaging technologies. ISMT will be headline sponsor and co-host this event, which will take place April 14-15 at the Hyatt in Burlingame.