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Hybrid Integration Platform Facilitates Photonic Circuits

Sep 2008
Photonic circuit boards increasingly are required as vendors aim to scale up data capacity while lowering the footprint, cost and power consumption of optical modules. Combining high-performance optical components with a hybrid integration platform is more attractive than a full monolithic integration approach because it can optimize device performance while maintaining cost-effective fabrication and manufacturing yields.

Graeme Maxwell, CIP Technologies, Ipswich, UK

Everyone is familiar with electronic circuit boards that combine varieties of electronic components. They first were developed several decades ago and now find application everywhere. Today, an equivalent photonic circuit board is being realized for the first time. UK-based CIP Technologies has developed the HyBoard™ technology platform, which allows different photonic components to be integrated to create circuit boards for applications spanning telecommunications, avionics, sensors, terahertz generation and optical processing.

The new platform brings together three main components — indium phosphide (InP) optoelectronic devices, single-mode planar silica waveguides and micromachined silicon submounts — and combines them cost-effectively to create a hybrid integrated photonic circuit board. It also is possible to extend the platform to add photonic elements such as optical isolators, thin-film filters and polarization elements. The versatility of the platform has been successfully demonstrated by the implementation of a range of complex integrated devices such as optical regenerators, optical flip-flops and optical pattern-matching circuits within research projects, and the technology now is becoming available for customer-driven commercial applications.

Passive alignment is key

The advantage of the hybrid integration approach relies on its not requiring all the photonic functions to be achieved in just one material system; e.g., InP. By balancing the photonic component technology requirements across various material systems (InP, silica and silicon), the required high-performance photonic circuit board function can be integrated with realistic and cost-effective device fabrication yields.

Typically, the device consists of the following:

• A planar silica single-mode waveguide motherboard that acts as the optical wiring and that can incorporate whatever passive function is required, such as interferometers, power splitters and arrayed waveguide gratings.

• An optoelectronic semiconductor device array. In Figure 1, these are semiconductor optical amplifier arrays. Laser arrays, electroabsorption modulator arrays and detector arrays also are possible. These devices have optical mode expansion and precision-cleave features.

Figure 1. Elements of the HyBoard™ platform for a typical design (top center) are depicted. The hybrid integrated device consists of a planar silica single-mode waveguide motherboard (bottom left), an optoelectronic semiconductor device array such as semiconductor optical amplifier arrays (bottom right) and a silicon submount — or daughterboard (bottom center). Arrays of optical fibres can be connected to the motherboard via a silicon arrowhead (top right).

• The silicon submount — or daughterboard — used to mechanically align the optoelectronic and passive devices together.

The flexibility and cost-effectiveness of the platform come from using passive alignment for the positioning and assembly of the individual components onto the integrated board. To achieve passive assembly with low optical loss — which is a prerequisite as the levels of integration increase — the optical mode diameters at the interfaces must be a multiple of 4 of the error in positional accuracy available with the employed alignment process. In this way, the minimum coupling loss error can be kept below 1 dB.

The optical interface mode size used has, therefore, been designed to be close to standard single-mode fibre SMF-28. This value permits a relatively large misalignment error of between 2 and 3 μm in the lateral positioning of chips while maintaining low coupling loss. In addition, various optical component manufacturers already incorporate optical mode expansion for coupling discrete devices to optical fibre and will be able to reuse this knowledge in new devices they design for integration into the new platform.

The alignment features used for lateral positioning are lithographically defined mechanical end stops patterned onto the daughterboards and motherboards using SU8 polymer. There are also precision-cleave features on the InP chips to align against these mechanical end stops. The vertical alignment reference frame is the top of the cladding of the silica motherboard. The difference in vertical heights between the active chip and the passive motherboard is compensated for by micromachining a terrace on the silicon daughterboard to the appropriate depth. The silicon submount also has precision edges, which are mechanically aligned to the end stops patterned onto the motherboard.

Figure 2. An indium phosphide device is aligned on a silicon daughterboard against mechanical end stops. It is flip-chipped and pushed against the front stop (bottom center) and the side stops (bottom center and top center). The three wire bonds from the back of the chip are shown in the middle left-hand side of the electron micrograph.

Realizing optical circuit boards that fit together well mechanically relies on sophisticated design of the whole hybrid integrated circuit. There is as much design involved in the “landing site” for the silicon submount on the motherboard as there is for the optical silica waveguide device itself. However, once established and standardized for a particular silicon submount, the same landing site can be reused for various planar silica motherboard optical designs as required. This key feature of reusability leads to much faster cycle times and to improved affordability compared with full monolithic integration.

The economic argument

Using integration to reduce size, increase functionality and reduce cost is one of the next key advances in photonics. For example, in telecommunications applications, there is currently much interest in lowering the cost of multiple transmitters and receivers by using integration. To implement a multifunction optical device such as a multichannel wavelength division multiplexing optical transmitter consisting of multiple lasers, modulators, variable optical attenuators, detectors and the multiplexer, three main approaches can be adopted: Splice together discrete packaged components, fabricate a full monolithic device or fabricate a hybrid device.

CIP Technologies has performed its own cost analysis of all three methods using a “bottom up” approach from the perspective of a fabricator. It was carried out to assess the cost of producing the desired optical device as a function of individual element yield and showed that, for the discrete device case, costs almost were independent of device yield, as expected. This reflects the fact that packaging and testing costs dominate over chip fabrication costs for discrete devices. At the other extreme, the cost of producing the same transmitter function using a full monolithic chip was extremely sensitive to element yield.

The analysis showed that yields of >95 per cent were required before the monolithic approach costed in against discrete devices. (The yield calculation used a simple power law function for defect density and errs on the pessimistic side). Significantly, the hybrid integration approach was found to be lower in cost compared with both discrete and monolithic options and was achievable at practical manufacturing fabrication yields (65 to 95 per cent). For the hybrid approach, smaller array sizes that were high-yield and cost-effective were used to build up the desired number of transmitter channels.

The flexibility of the hybrid integration platform in creating a range of photonic circuit boards is expected to have a significant impact on many applications because they all share the common requirements of smaller size and reduced price and power needs.

Contact: Graeme Maxwell, vice president of integration technologies, CIP Technologies; tel: +44 1473 663 247; e-mail:

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